Increasing number of modern electronic appliances use microchips. To allow easy identification, most microchips include a “device identification (ID) register” where important identification information about the respective microchip, such as place of manufacture, batch number and design version, is permanently stored in a binary form.
Shown in FIG. 1 is a typical vendor-defined ID register code configuration 100 containing four fields. In particular, the 32-bit identification code shown in FIG. 1 contains ‘1’ in its less significant bit (LSB) section 101. In the second section 102, bits 1 to 11 include an 11-bit manufacturer-identity code, which in this case is a compressed version of the code specified by the Electronic Industries Association/Joint Electron Device Council (EIA/JEDEC). Bits 12 to 27, in section 104 of the code 100, represent a 16-bit part number that is often used to verify the type of microchip inserted in a particular location of an assembled product. Bits 28 to 31, of section 106 of the code, represent the device (microchip) version number, which indicates the specific version of the microchip, in cases where several versions are available.
To facilitate subsequent output of the ID register code, the ID register data is processed by a shift-register (not shown). In particular, the device ID register is set so that, once the “Capture-Data Register” state of the controller (not shown) triggers an interrogation of the ID register, subsequent clocking of the shift register causes the identification code to be presented in serial form at the test data out (TDO) output of the shift register.
Shown in FIG. 2 is a single device ID register cell 200, which includes a memory element 202. The memory element 202 receives its data input from a multiplexer 204, which effectively selects between the bit 206, representing the ID code, and the output 208 from a previous ID register cell, not shown. The input 210 provides the control signal to the multiplexer 204, while the clock input 212 drives the memory element 202.
FIG. 3 shows a typical hard-coded hardware implementation of a 32 bit ID code register 300. Whilst the memory elements here are represented by LPH latches 302, it would be obvious to a skilled addressee that other types of latches can also be used. The data input to the latches is provided by respective multiplexers 304. The inputs to the multiplexers 304, on the other hand, are provided by the test-data-in (TDI) signal 306 and the ID code data 308 (IDCODE—31 to IDCODE—0). The input 310 (SHIFT DR) provides control signal to the multiplexers 304. The ID code data 308 is obtained from a data bus output from the Device ID code register, where the ID data is hard-coded.
As discussed above, well established methods for programming and reading of the ID data registers of microchips exist in the art. However, there have been recent developments in the microchip manufacturing towards integration of multiple functions with sharable core design within a single microchip. It should be noted here that the term “core” here is used to indicate the identical unit of logic, or microchip layout design, shared by identical microchips regardless of their specific programming and application. Such multi-functionality allows identical microchips to be used in a plurality of applications and devices, each having specific features targeted towards a specific market segment. This represents a cost effective approach to a bulk-volume production.
The identification of the multiple functionalities of such microchips has so far been implemented by adding informational digits to the ID register and introducing additional pins to the microchip package, for programming these digits. As discussed previously, during testing, the ID register is interrogated and the unique combination of digits, including the additional function-defining digits, is obtained to verify the identity of the microchip.
One disadvantage is related to the fact that the increased number of pins adds complexity to the packaging stage. A further disadvantage relates to the fact that, since the pins are readily accessible, the device is vulnerable to back-engineering.
Accordingly, it is desirable to develop a method and a system for programming the identification register of such microchips, which helps alleviate at least some the above disadvantages or to offer a useful alternative.